Conventional DRAM bit line stack processes use a plurality of different/independent tools to perform corresponding processes on a substrate (e.g., a wafer) having a polysilicon plug (poly plug), which was previously fabricated on the substrate. For example, processes that are, typically, performed on the substrate can include one or more types of pre-cleaning processes, barrier metal deposition, barrier layer deposition, bit line metal deposition, hard mask deposition, etc.
The inventors have observed that oxidation on the deposited films, which can be caused by exposing the substrate to atmospheric pressure conditions, can occur post poly plug fabrication, and can continue to occur after each subsequent process is performed on the substrate, e.g., poly plug to barrier metal deposition, barrier metal deposition to barrier layer deposition, barrier layer deposition to bit line metal deposition, and so on. The oxidation can lead to resistance drawbacks on the substrate (i.e., lack of ohmic contact), and material property degradation of the substrate.
Therefore, the inventors have provided improved methods and apparatus for processing a substrate useful, for example, for DRAM bit line stack processes.